P001 - PAL16L8A - chip select/BERR/AVEC/DSACK0 decoder

   AS*  1     20  Vcc
  CPU*  2     19  nc
   A17  3     18  BERR*
   A16  4     17  RAMCS*
   A15  5     16  IOCS*
   A14  6     15  ROMCS*
   A13  7     14  AVEC*
  CPP*  8     13  FPCPCS*
    nc  9     12  DSACK0*
  GND  10     11  nc



AVEC = AS & CPU & A17 & A16

FPCPCS = CPU & CPP & A17 & A16*                 # include AS?

BERR = AS & CPU & CPP* & A17 & A16*             # FPCP not installed
     + AS & CPU & CPP & A17 & A16* & A15        # wrong coprocessor ID
     + AS & CPU & CPP & A17 & A16* & A14        # wrong coprocessor ID
     + AS & CPU & CPP & A17 & A16* & A13        # wrong coprocessor ID
     + AS & CPU & A16                           # access level control
     + AS & CPU* & A17                          # 0x20000-3ffff
     + AS & CPU* & A16                          # 0x10000-1ffff
     + AS & CPU* & A17* & A16* & A15 & A14 & A13*  # 0x0c000-0dfff
     + AS & CPU* & A17* & A16* & A15 & A14* & A13  # 0x0a000-0bfff

RAMCS = AS & CPU* & ((A17* & A16* & A15* & A14* & A13)  |    # 0x2000-3fff
                     (A17* & A16* & A15* & A14  & A13*) |    # 0x4000-5fff
                     (A17* & A16* & A15* & A14  & A13)  |    # 0x6000-7fff
                     (A17* & A16* & A15  & A14* & A13*))     # 0x8000-9fff

ROMCS = AS & CPU* & A17* & A16* & A15* & A14* & A13*         # 0x0000-1fff

IOCS = AS & CPU* & A17* & A16* & A15 & A14 & A13	     # 0xe000-ffff

FPCPCS = CPU + CPP + A17 + A16* + A15* + A14* + A13*

DSACK0 = ROMCS + IOCS + RAMCS



# DSACK0* is externally buffered (OC) to drive the MC68020 DSACK0*
#            (8-bit ROM, I/O)
#            (32-bit RAM)

# RAMCS* is externally buffered (OC) to drive the MC68020 DSACK1*
#          (32-bit RAM)