WD900-FD-ADAPTER notes 2015-12-02 Copyright 2015 Eric Smith The WD900-FD-ADAPTER hardware design files, including the schematic diagram, printed circuit board layout, and this README.txt file are provided under the Creative Commons Attribution-ShareAlike 4.0 International license, which is in the file legalcode.txt or may be found at: http://creativecommons.org/licenses/by-sa/4.0/ Description: The Western Digital Pascal Microengine board (WD900) and box (WD90) use a DC37S connector for attachment of external 8-inch floppy drives. The WD900-FD-ADAPTER adapts the DC37S connector to a 50 pin shrouded male header using the standard 8-inch floppy drive pinout. The WD900 uses a WD FD1791 floppy disk controller chip. Typically the HLD (Head Load) output of the FD1791 would drive a one-shot, and the output of the one-shot would drive the FD1791 HLT (Head Load Timing) input, with the one-shot adjusted to provide a time delay of at least as long as the drive head load time. The WD900 wires HLT to a pin of the DC37S connector. The WD900-FD-ADAPTER uses a PIC microcontroller to provide head load timing with 16 time delays selectable by a four-position DIP switch. Revision 1 Design Errors: * P5 pin 1 is on OPPOSITE row of connector from dot. The dot is actually nearest to P5 pin 2. Possible improvements for a future revision: * should have a power LED * should have ground, power test points * PIC pin 4 (MCLR) should have a pullup resistor. Not strictly necessary as long as config bits are set to disable MCLR. * ICD 6-pin SIP connector should be rotated 180 degrees to be more suitable for use of a right-angle header * Modular connector footprint should be added for ICD (stuff option: 6-pin SIP, modular, none) * need to select NAMES and VALUES layers for silkscreen